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  this is information on a product in full production. may 2013 docid13866 rev 6 1/18 ST2S06 dual synchronous rectification with reset or inhibit, 0.5 a, 1.5 mhz adjustable step-dow n switching regulator datasheet - production data features ? step-down current mode pwm (1.5 mhz) dc- dc converter ? fixed or adjustable output voltage from 0.8 v ? 2% dc output voltage tolerance ? synchronous rectification ? reset function for a version ? inhibit function for b version ? internal soft start for startup current limitation and power on delay of 50-100 s ? typical efficiency: > 90% ? 0.5 a output current capability ? non-switching quiescent current: max 1.2 ma over temperature range ? r ds(on) 150 m ? (typ.) ? uses tiny capacitors and inductors ? available in qfn12l (4x4 mm) description the ST2S06a33 and ST2S06b are dual step- down dc-dc converters optimized for powering low-voltage digital cores in odd applications and, generally, to replace high current linear solutions when the power dissipation may cause high heating of the application environment. it provides up to 0.5 a over an input voltage range of 2.5 v to 5.5 v. a high switching frequency of 1.5 mhz allows the use of tiny surface-mount components as well as a resistor divider to set the output voltage value. only an inductor and two capacitors are required. a low output ripple is guaranteed by the current mode pwm topol ogy and the utilization of low esr smd ceramic capacitors. the devices are thermally protected and current-limited to prevent damage due to accidental short-circuit. the ST2S06a33 and ST2S06b are available in the qfn12l (4x4 mm) package. qfn12l (4 x 4 mm) table 1. device summary order codes package packaging ST2S06a33pqr qfn12l (4 x 4 mm) tape and reel ST2S06bpqr www.st.com
contents ST2S06 2/18 docid13866 rev 6 contents 1 schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 typical performance characteris tics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
docid13866 rev 6 3/18 ST2S06 schematic diagram 18 1 schematic diagram figure 1. schematic diagram * ST2S06a33 ** ST2S06b ref control logic soft start gnd sw2 sw reset_out * fb1 gnd vi_sw vi_a fb2 hv ref delay trimming vi_sw inh** ref control logic soft start gnd sw2 sw reset_out * fb1 gnd vi_sw vi_a fb2 hv ref delay trimming vi_sw inh**
pin configuration ST2S06 4/18 docid13866 rev 6 2 pin configuration figure 2. pin connections (top view) table 2. pin description pin n ST2S06a33 ST2S06b name and function 1 hv hv programing pin. it must be floating or connected to gnd. 2 fb2 fb2 feedback voltage 3 gnd2 gnd2 power ground 4 sw2 sw2 switching pin 5 vin_sw vin_sw power input voltage pin 6 sw1 sw1 switching pin 7 gnd1 gnd1 power ground 8 fb1/out1 fb1 feedback voltage / output voltage 9 reset_out nc reset out pin 10 nc inh inhibit pin 11 vin_a vin_a supply for analog circuit 12 gnd_a gnd_a system ground
docid13866 rev 6 5/18 ST2S06 maximum ratings 18 3 maximum ratings note: absolute maximum ratings ar e those values beyond which damage to the device may occur. functional operation under these conditions is not implied. table 3. absolute maximum ratings symbol parameter value unit v in_sw positive power supply voltage -0.3 to 7 v v in_a positive power supply voltage -0.3 to 7 v v inh inhibit voltage -0.3 to 7 v switch voltage max. voltage of output pin -0.3 to 7 v v fb1,2 /v o1 feedback voltage/output voltage -0.3 to 2.5 v v o1 output voltage (for v o > 1.6 v) -0.3 to 5 v current into vfb pin common mode input voltage +1 to -1 ma t j max junction temperature 150 c t stg storage temperature range -65 to +150 c t lead lead temperature (soldering) 10 sec. 300 c table 4. thermal data symbol parameter value unit r thjc thermal resistance junction-case 10 c/w r thja thermal resistance junction-ambient 60 c/w table 5. esd performance symbol parameter test conditions value unit esd esd protection voltage hbm-dh11c 4 kv
electrical characteristics ST2S06 6/18 docid13866 rev 6 4 electrical characteristics v in_sw = v in_a = 5 v, v 01 = 3.3 v, v o2 = 1.2 v, c 1 = 4.7 f, c 2 = c 3 = 22 f, l1 = l2 = 3.3 h, t j = - 30 to 125 c unless otherwise specified. typical values are referred to 25 c. table 6. electrical characteristics for the ST2S06a33 symbol parameter test conditions min. typ. max. unit out 1 output feedback pin 3.23 3.3 3.37 v fb 2 feedback voltage 784 800 816 mv i o1 i o1 pin bias current v o = 3.5 v 15 20 a i fb2 v fb pin bias current v fb = 1 v 600 na i q quiescent current v fb = 1 v 1.2 ma i o1,2 output current v in = 4 to 5.5 v (1) 0.8 a i min minimum output current 1 ma %v o1,2 / ? v i n reference line regulation 4v < v in < 5.5 v 0.032 %v o / v in ? v o1,2 reference load regulation 10ma < i o < 0.5 a 5.5 15 mv pwm f s pwm switching frequency (1) v fb = 0.7 v, t a = 25c 1.2 1.5 1.8 mhz d max maximum duty cycle v fb = 0.7 v, t a = 25c 85 94 % i swl switching current limitation 1 1.2 a i lkn nmos leakage current v fb = 0.9 v, t a = 25c 0.1 a i lkp pmos leakage current v fb = 0.9 v, t a = 25c 0.1 a r dson -n nmos switch on resistance i sw = 250 ma 0.15 0.3 w r dson -p pmos switch on resistance i sw = 250 ma 0.2 0.4 w ? efficiency i o = 20 ma to 100 ma 75 % i o = 100 ma to 0.5 a 90 % t shdn thermal shut down (2) 130 150 c t hys thermal shut down hysteresis (2) 15 c ? v o1,2 / ? i o load transient response (2) 100 ma < i o < 500 ma t r = t f => 100 ns, t a = 25c -5 +5 %v o reset section t del delay time t a = 25c 80 85 ms v res reset in threshold measured on input pin v in_a rising 4.5 4.6 4.75 v v in_a falling 4.12 4.2 4.28 1. v o = 90% of nominal value. 2. guaranteed by design, but not tested in production.
docid13866 rev 6 7/18 ST2S06 electrical characteristics 18 v in_sw = v in_a = 5 v, v o1,2 =1.2 v, c 1 = 4.7 f, c 2 = c 3 = 22 f, l1 = l2 = 3.3 h, t j = -30 to 125 c unless otherwise specified. typical values are referred to 25 c. table 7. electrical characteristics for the ST2S06b symbol parameter test conditions min. typ. max. unit fb 1,2 feedback voltage 784 800 816 mv i fb1,2 v fb pin bias current v fb = 1 v 600 na i q quiescent current v inh > 1.2 v, v fb = 1 v 1 ma v inh < 0.4 v 1 a i o1,2 output current v in = 2.5 to 5.5 v (1) 0.8 a i min minimum output current 1 ma v inh inhibit threshold 2.5v < v in < 5 v 1.2 2.5v < v in < 5.5 v 1.3 v device off 0.4 i inh1,2 inhibit pin current 2 a %v o1,2 / ? v in reference line regulation 2.5v < v in < 5.5 v 0.032 %v o / v in ? v o1,2 reference load regulation 10 ma < i o < 0.5 a 5.5 15 mv pwm f s pwm switching frequency (1) v fb = 0.7 v, t a = 25c 1.2 1.5 1.8 mhz d max maximum duty cycle v fb = 0.7 v, t a = 25c 85 94 % i swl switching current limitation 1 1.2 a i lkn nmos leakage current v fb = 0.9 v, t a = 25c 0.1 a i lkp pmos leakage current v fb = 0.9 v, t a = 25c 0.1 a r dson -n nmos switch on resistance i sw = 250 ma 0.15 0.3 w r dson -p pmos switch on resistance i sw = 250 ma 0.2 0.4 w ? efficiency i o = 20 ma to 100 ma 75 % i o = 100 ma to 0.5 a 90 % t shdn thermal shut down (2) 130 150 c t hys thermal shut down hysteresis (1) 15 c ? v o1,2 / ? i o load transient response (1) 100 ma < i o < 500 ma, t r = t f 1 => 100 ns, t a = 25c -5 +5 %v o 1. v o = 90% of nominal value. 2. guaranteed by design, but not tested in production.
typical performance characteristics ST2S06 8/18 docid13866 rev 6 5 typical performance characteristics figure 3. feedback voltage 1 vs. temperature (ST2S06b) figure 4. feedback voltage 2 vs. temperature (ST2S06b) figure 5. efficiency vs. output current 1 figure 6. efficiency vs. output current 2 figure 7. switching frequency vs. temperature (ST2S06a33) figure 8. duty cycle vs. temperature (ST2S06a33) 0.78 0.79 0.8 0.81 0.82 -50 -25 0 25 50 75 100 125 temperature [c] v fb1 [v] v i =5v, v fb1 connected to v o1 i o1 =i o2 =no load 0.78 0.79 0.8 0.81 0.82 -50 -25 0 25 50 75 100 125 temperature [c] v fb1 [v] v i =5v, v fb1 connected to v o1 i o1 =i o2 =no load 0.78 0.79 0.8 0.81 0.82 -50 -25 0 25 50 75 100 125 temperature [c] v fb2 [v] v i =5v, v fb2 connected to v o2 i o1 =i o2 =no load 0.78 0.79 0.8 0.81 0.82 -50 -25 0 25 50 75 100 125 temperature [c] v fb2 [v] 0.78 0.79 0.8 0.81 0.82 -50 -25 0 25 50 75 100 125 temperature [c] v fb2 [v] v i =5v, v fb2 connected to v o2 i o1 =i o2 =no load v i =5v, v o1 =3.3v, i o2 no load 60 65 70 75 80 85 90 95 100 0 0.1 0.2 0.3 0.4 0.5 0.6 output current 1 [a] efficiency [%] v i =5v, v o1 =3.3v, i o2 no load 60 65 70 75 80 85 90 95 100 0 0.1 0.2 0.3 0.4 0.5 0.6 output current 1 [a] efficiency [%] 40 45 50 55 60 65 70 75 80 85 90 95 100 0 0.1 0.2 0.3 0.4 0.5 0.6 output current 2 [a] efficiency [%] v i =5v, v o2 =1.2v, i o1 no load 40 45 50 55 60 65 70 75 80 85 90 95 100 0 0.1 0.2 0.3 0.4 0.5 0.6 output current 2 [a] efficiency [%] v i =5v, v o2 =1.2v, i o1 no load v i =5v, v fb1 =3.2v, v fb2 =0.7v 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 -50 -25 0 25 50 75 100 125 temperature [c] frequency [mhz] v i =5v, v fb1 =3.2v, v fb2 =0.7v 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 -50 -25 0 25 50 75 100 125 temperature [c] frequency [mhz] v i =5v, v fb1 =3.2v, v fb2 =0.7v 90 91 92 93 94 95 96 97 98 99 100 -50 -25 0 25 50 75 100 125 temperature [c] duty cycle [%] v i =5v, v fb1 =3.2v, v fb2 =0.7v 90 91 92 93 94 95 96 97 98 99 100 -50 -25 0 25 50 75 100 125 temperature [c] duty cycle [%]
docid13866 rev 6 9/18 ST2S06 typical performance characteristics 18 figure 9. switching frequency vs. temperature (ST2S06b) figure 10. inhibit threshold vs. temperature (ST2S06b) figure 11. switching current limitation vs. input voltage (ST2S06a33) figure 12. pmos switch on resistance vs. temperature figure 13. nmos switch on resistance vs. temperature figure 14. delay time vs. temperature (ST2S06a33) v i rising from 0v to 5v, delay from v res threshold and reset pin below 0v. 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 -50 -25 0 25 50 75 100 125 temperature [c] frequency [mhz] 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 -50 -25 0 25 50 75 100 125 temperature [c] frequency [mhz] v i =5v, i o1 =i o2 =100ma 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -50 -25 0 25 50 75 100 125 t [c] v inh (v) on off v i =5v, i o1 =i o2 =100ma 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -50 -25 0 25 50 75 100 125 t [c] v inh (v) on off v i from 2.5v to 5.5v, output2 maximum load current 1 1.2 1.4 1.6 1.8 2 2.5 3 3.5 4 4.5 5 5.5 v i [v] i sw2 [a] v i from 2.5v to 5.5v, output2 maximum load current 1 1.2 1.4 1.6 1.8 2 2.5 3 3.5 4 4.5 5 5.5 v i [v] i sw2 [a] v cc =5v, i sw =250ma 100 120 140 160 180 200 220 240 -50 -25 0 25 50 75 100 125 t [c] r dson -p[mohm] v cc =5v, i sw =250ma 100 120 140 160 180 200 220 240 -50 -25 0 25 50 75 100 125 t [c] r dson -p[mohm] v cc =5v, i sw= 250ma 50 70 90 110 130 150 170 -50 -25 0 25 50 75 100 125 t [c] r dson -n[mohm] v cc =5v, i sw= 250ma 50 70 90 110 130 150 170 -50 -25 0 25 50 75 100 125 t [c] r dson -n[mohm] v i v res
typical performance characteristics ST2S06 10/18 docid13866 rev 6 figure 15. delay time vs. temperature (ST2S06a33) figure 16. reset in threshold vs. temperature (ST2S06a33) figure 17. load transient response (ST2S06a33) figure 18. startup transient (ST2S06a33) v i = 5v, i o1 from 100ma to 500ma v i = from 0v to 5v, i o1 =500ma, output voltage=3.3v v i rising from 0v to 5v 50 55 60 65 70 75 80 85 90 95 100 -50 -25 0 25 50 75 100 125 t [c] t del (ms) v i rising from 0v to 5v 50 55 60 65 70 75 80 85 90 95 100 -50 -25 0 25 50 75 100 125 t [c] t del (ms) rising falling 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5 -50 -25 0 25 50 75 100 125 t [c] v res (v) rising falling 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5 -50 -25 0 25 50 75 100 125 t [c] v res (v) i o1 v o1 v i v o1 figure 19. startup transient (ST2S06b) f igure 20. inhibit transient (ST2S06b) v i = from 0v to 5v, i o1 =1a, output voltage=1.2v v inh = from 0v to 2v, v i =5v, i o1 =i o2 =1a v i v o1 i o1 v inh v o1 v o2
docid13866 rev 6 11/18 ST2S06 typical application 18 6 typical application figure 21. application circuit for the ST2S06a33 22 f c2 v o1 l1 v in vin_a vin_sw c1 4.7 f sw2 r3 r4 c3 22 f v o2 3.3 h 3.3 h l2 gnd2 r1 r2 reset_out gnd_a vfb2 vfb1 sw1 gnd1 nc ST2S06a33 hv figure 22. application circuit for ST2S06b 22f c2 v o1 l1 v in vin_a vin_sw c1 4.7f sw2 r3 r4 c3 22f v o2 3.3h 3.3h l2 gnd2 r1 r2 nc gnd_a vfb2 vfb1 sw1 gnd1 inh ST2S06b hv 22f c2 v o1 l1 v in vin_a vin_sw c1 4.7f sw2 r3 r4 c3 22f v o2 3.3h 3.3h l2 gnd2 r1 r2 nc gnd_a vfb2 vfb1 sw1 gnd1 inh ST2S06b hv
application information ST2S06 12/18 docid13866 rev 6 7 application information the ST2S06a33 and ST2S06b represent a series of dual adjustable current mode pwm step-down dc-dc converters with an internal 0.5 a power switch, packaged in a qfn12l (4x4 mm). it is a complete 0.5 a switching regulator wit h internal compensation that eliminates the need for additional components. the constant frequency, current mode, pwm architecture and stable operation with ceramic capacitors results in low, predictable output ripple. to clamp the error amplifier reference voltage a soft start control block generating a voltage ramp has been implemented. other circuits fitt ed to the device protection are the thermal shut-down block, which turns off the regulator when the junction temperature exceeds 150 c (typ.), and the cycle-by-cycle current limitin g that provides protection against shorted outputs. the output voltage is determined by an extern al resistor divider, as the ST2S06a33 and ST2S06b are adjustable regulators. the desire d value is given by the following equation: v o = v fb [1+r1/r2] operation of the device requires few components: 2 inductors, 3 capacitors and a resistor divider. the chosen inductor must be capable of not saturating at the peak current level. its value should be selected keeping in mind that a large inductor value increases the efficiency at low output current and reduces output voltage ripple, while a smaller inductor can be chosen when it is important to reduce package size and total application cost. finally, the ST2S06a33 and ST2S06b have been designed to work properly with x5r or x7r smd ceramic capacitors both at the input and at the output. these types of capacitors, due to their very low series resistance (esr), minimize the output voltage ripple. other low esr capacitors can be used according to the need of the application without compromising the correct functionality of the device. due to the hi gh switching frequency and peak current, it is important to optimize the application environmen t by reducing the length of the pcb traces and placing all the external components near the device. figure 23. reset function v tl v th v in reset t del v tl v th v in reset t del
docid13866 rev 6 13/18 ST2S06 package mechanical data 18 8 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data ST2S06 14/18 docid13866 rev 6 dim. mm. inch. min. typ. max. min. typ. max. a 0.80 0.90 1.00 0.031 0.035 0.039 a1 0.02 0.05 0.001 0.002 a3 0.20 0.008 b 0.25 0.30 0.35 0.010 0.012 0.014 d 3.90 4.00 4.10 0.154 0.157 0.161 d2 2.00 2.15 2.25 0.079 0.085 0.089 e 3.90 4.00 4.10 0.154 0.157 0.161 e2 2.00 2.15 2.25 0.079 0.085 0.089 e 0.80 0.031 l 0.45 0.55 0.65 0.018 0.022 0.026 qfn12l (4x4) mechanical data 7936361b
docid13866 rev 6 15/18 ST2S06 package mechanical data 18 dim. mm. inch. min. typ. max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 99 101 3.898 3.976 t 14.4 0.567 ao 4.35 0.171 bo 4.35 0.171 ko 1.1 0.043 po 4 0.157 p 8 0.315 tape & reel qfnxx/dfnxx (4x4) mechanical data
package mechanical data ST2S06 16/18 docid13866 rev 6 figure 24. qfn12l (4x4 mm) footprint recommended data
docid13866 rev 6 17/18 ST2S06 revision history 18 9 revision history table 8. document revision history date revision changes 3-sep-2007 1 initial release. 21-jan-2008 2 added root part number ST2S06d33. 18-mar-2008 3 modified: table 2 on page 4 . 28-jul-2009 4 modified: table 1 on page 1 . 24-may-2012 5 ? changed max value for non-switching quiescent current to 1.2 ma in features on page 1. ? updated part number in figure 21 on page 11 ? minor text changes throughout the document 22-may-2013 6 ? changed title in cover page
ST2S06 18/18 docid13866 rev 6 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not authorized for use in weapons. nor are st products designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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